Category: memory
SwissChips: A national project in full swing
ESL alumnus Alexandre Levisse explores the SwissChips initiative in an in-depth interview. This exciting national collaboration is aiming to boost the Swiss chip manufacturing industry.
Collaboration with University of Bordeaux for structured pruning co-design
Our team collaborated with scientists from the University of Bordeaux to analyze how configuration choices across the stack affect performance metrics. Results demonstrate that structured pruning on systems featuring systolic array acceleration can effectively increase performance, while maintaining high QoS levels. Up to 44% system-wide speedups due to structured pruning and quantization were measured, with (…)
Accelerating the validation process of full systems without sacrificing accuracy
Introducing the first open-source RISC-V-based FS-validated simulation models with a complete and replicable methodology Full-System simulation is essential for performance evaluation of complete systems that execute complex applications on a complete software stack consisting of an operating system and user applications. Nevertheless, they require careful fine-tuning against real hardware to obtain reliable performance statistics, which (…)
Optimizing interconnects with amazing results
One of our teams has rolled out Gem5-AcceSys: an innovative framework for a system-level exploration of standard interconnects and configurable memory hierarchies. A series of tests using this new technology will be presented at the Design Automation Conference in San Francisco. In this study it has been shown that optimized interconnects can achieve up to (…)
ESL is participating in three SwissChips projects!
As the SwissChips initiative bursts into activity we can confirm our participation in three of the seven projects that involve EPFL researchers. Design Infrastructure Chips for Edge AI Computing Systems-on-Chip Find out more here:https://ecocloud.epfl.ch/research/swisschips/
ClearSpace will use Minority Report technology from ESL
Satellites are open to attack. All communications systems are vulnerable to hackers by definition, and are protected accordingly, with hardware and software. However, because they reside outside the protection of the Earth’s atmosphere, satellites are perhaps exposed to the mightiest and most unpredictable hacker of all: the Sun. “The Sun’s radiation can affect the data (…)
Cooling down hotspots – 3D-ICE
3D chips are a great idea – processors placed one on top of the other, for a superfast transmission of data. The trouble is that chips heat up, and if you pile them up they heat up even faster. 3D-ICE is a powerful thermal emulator for three-dimensional computing. Version 3.1 is presented in a new (…)
Innovations using analog in memory cores
A new article has been published showcasing exciting innovations, using AIMC (Analog in memory cores). Recent ESL alumnus Josh Klein, EPFL alumnus Irem Boybat, current ESL senior scientist Giovanni Ansaloni and ESL host professor Marina Zapater collaborated to prepare this exciting new paper, which is published in IEEE Transactions on Parallel and Distributed Systems. The (…)
Predicting the future with CloudProphet
If we are going to reduce the carbon footprint of data centers we need to use computing resources more efficiently. If processes always made use of data center facilities in a regular way, it would be an easy game. However, the resources of a data center are used by customers (more often customers of customers) (…)
X-HEEP community is growing fast: X-Agora at EPFL
The Internet of Things is expanding at an incredible rate, and consequently demands for ever smaller intelligent hardware are constantly increasing. The Embedded Systems Lab has collaborated with other EPFL teams and EcoCloud to design X-HEEP: a RISC-V chip which is aimed at tiny platforms with big jobs to do. The X-HEEP platform is open (…)