Research Partners
 | IMEC |
Sources of Funding
| Fvllmonti |  |
The high computational requirements of ML applications pose a challenge to their deployment, especially when targeting resource-constrained devices. To address it, devised a new hardware solution supporting the high degree of parallelism offered by ML algorithms and leveraging their robustness towards low-range data representation. The pipeline is optimized for parallel, small-bitwidth arithmetics, using flexible Single Instruction Multiple Data (SIMD) formats. Its small area footprint allows its integration at the periphery of memory resources. |
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