Full system simulation and design

Novel architectures and accelerators need to be assessed from a full-system perspective, assessing their impact on the behaviour of the different componenets of the computing system. With our extension to the gem5 full system simulation framework, named gem5-X, we facilitate the identification of computational bottlenecks and the implementation of architectural extensions to resolve them.

We can analyze the trade-offs of novel architectures and their implementation possibilities, and explore the interplay between software and hardware. Examples of such extensions include models for analog in-memory cores, tightly coupled systolic arrays, and in-package wireless communication.

gem5-X: gem5 made easy

gXR5: A gem5-based full-system RISC-V simulator

Near-DRAM processors

Systolic Array Accelerators for Transformers

WiPLASH: In-package Wireless Links