Full-system integration of open-hardware RISC-V based architectures with novel interconnect technologies

The main design principles in computer architecture have shifted from a monolithic scaling-driven approach towards emerging heterogeneous architectures that tightly co-integrate multiple specialized computing and memory units. This heterogeneous hardware specialization requires interconnection mechanisms that serve the architecture communication demands. In this context, we perform system-level investigations and evaluations of wireless communication as a technology enabler for future Systems-on-Chip, interconnecting processing elements.