Research LineThermal, power and performance aware design of 2D/3D system-on-chip (SOC) architectures
| Ansaloni Giovanni
| Atienza Alonso David
| Zapater Sancho Marina
The main design principles in computer architecture have shifted from a monolithic scaling-driven approach towards emerging heterogeneous architectures that tightly co-integrate multiple specialized computing and memory units. This heterogeneous hardware specialization requires interconnection mechanisms that serve the architecture communication demands. In this context, we perform system-level investigations and evaluations of wireless communication as a technology enabler for future Systems-on-Chip, interconnecting processing elements.