| Ansaloni Giovanni
| Atienza Alonso David
| Constantinescu Denisa-Andreea
| Gaudillière Pierre
| Kechris Christodoulos
| Machetti Simone
| Miranda Calero José Angel
| Ponzina Flavio
| Rodriguez Álvarez Rubén
| Sapriza Araujo Juan Pablo
| Taji Hossein
The Internet of Things (IoT) has been hailed as the next frontier of innovation in which our everyday objects are connected in ways that improve our lives and transform industries. The IoT concept, enabled by the technological advances in miniaturized and low-cost embedded systems, is poised to reach 30 billion connected devices by 2030, but major key challenges remain in achieving this potential due to the inherent complexity of designing "by construction" functionally correct IoT systems, coupled with the tight time-to-market and cheap design cost target.
This research project aims to conceive a complete system-level co-design (covering hardware and software) methodology for the next-generations of the artififial intelligence (AI) enabled IoT devices. This project includes different sub‐topics to explore ranging from composable system functionality using a reusable set of hardware building blocks to define families of electronic platforms with different costs and capabilities, to the development of a standardized optimization and verification flow for different software services, according to the final target functionality of the system. In particular, it will be explored the identification and definition of services for personalized electronics that can be mapped and automatically adapted to the underlying hardware components for each specific final implementation.
In addition, this project will explore the benefits for future AI-enabled IoT devices of including a set of specialized accelerators and computing blocks (exploring single- vs multi-core based designs, memory and synchronization choices) that can improve the main functionalities of the final smart or edge AI devices in the IoT ear. Moreover, this platform-based co-design approach will enable to include state-of-the-art power management schemes for single- and multi-core solutions in the context of energy-efficient smart home and IoT devices.
Overall, the final goal of this project is to dramatically reduce the time-to-market of final edge AI products by improving the reusability of developed components with a common open-hardware platform-based design methodology. This research project outcome targets to produce a dramatic reduction of development, testing and validation costs for the next-generation of AI-enabled IoT devices.
|Dynamic Scheduling for Event-Driven Embedded Industrial Applications
|Taji, Hossein; Miranda Calero, José Angel; Peon Quiros, Miguel; Balási, Szabolcs; Atienza Alonso, David
|TiC-SAT: Tightly-coupled Systolic Accelerator for Transformers
|Amirshahi, Alireza; Klein, Joshua Alexander Harrison; Ansaloni, Giovanni; Atienza Alonso, David
|Using Algorithmic Transformations and Sensitivity Analysis to Unleash Approximations in CNNs at the Edge
|Ponzina, Flavio; Ansaloni, Giovanni; Peon Quiros, Miguel; Atienza Alonso, David
|MDPI Micromachines - Special Issue "Hardware-Friendly Machine Learning and Its Applications"
|Machine-Learning Based Monitoring of Cognitive Workload in Rescue Missions with Drones
|Dell'Agnola, Fabio; Jao, Ping-Keng; Arza, Adriana; Chavarriaga, Ricardo; R. Millan, Jose del; Floreano, Dario; Atienza, David
|IEEE Journal of Biomedical and Health Informatics
|A hardware/software co-design vision for deep learning at the edge
|Ponzina, Flavio; Machetti, Simone; Rios, Marco Antonio; Denkinger, Benoît Walter; Levisse, Alexandre Sébastien Julien; Ansaloni, Giovanni; Peon Quiros, Miguel; Atienza Alonso, David
|IEEE Micro - Special Issue on Artificial Intelligence at the Edge
|E2CNN: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices
|Ponzina, Flavio; Peon Quiros, Miguel; Burg, Andreas Peter; Atienza Alonso, David
|IEEE - Transactions on Computers