This research line focuses on the design and architectural exploration of 2D and 3D multi-processor systems-on-chip (SoCs) with the goal of finding the best trade-offs between performance, power, reliability and workload-related metrics such as accuracy. This line also tackles the design of novel liquid single-phase and two-phase cooling mechanisms for 2D and 3D stacked chips, as well as methods for integrated on-chip cooling and power delivery.
Novel in-memory computing accelerators for Machine Learning (ML) on the edge
Exploration of heterogeneous architectures for novel QoS-constrained high-performance computing applications
Novel cooling techniques and thermal-aware design and management to increase the reliability of 2D/3D MPSoCs
Full-system integration of open-hardware RISC-V based architectures with novel interconnect technologies
Integrated power delivery and cooling control for 3D chips using Flow Cell Arrays (FCAs)
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