Integrated Circuits and FPGA Design

Project descriptions will be published by the end of the semester lectures. If you are already interested in the general topic, or have project proposal related, feel free to already contact us.

Transistor-Level Digital and Analog Circuits for Signal Processing

Demanding signal processing tasks are usually realized based on a semicustom design principle using hardware-description languages (e.g., VHDL or Verilog) and then synthesized using automatic tools. However, such a conservative semicustom design approach can often not reach the highest performance and lowest power consumption. Hence, it is interesting to explore fully custom digital or even (partially) analog circuits for implementing the most critical and demanding building blocks. In our research, we study using such a full-custom design approach for DSP (digital signal processing), including communications and machine learning. A popular example are circuits for in-memory computation for AI/ML, but there are also other examples where an entire algorithm can be realized with exceptional speed and efficiency using full custom design.   

Contact: Ludovic Blanc, Andreas Burg

Low-power Integrated Circuits on Transistor Level

Low-power integrated circuit design on transistor level comprises the design of new, alternative logic styles, reliable low-power digital design methods, low voltage design, and the design of voltage regulators. Circuits are either building blocks for larger scale integrated circuits to be built using HDL synthesis (e.g., standard cells) or fully custom, complete digital integrated circuits such as small always-on building blocks.

Contact: Andac Yigit, Clément Choné, Andreas Burg

Digital Architectures for Signal Processing on FPGAs or ASIC (e.g., for Communications)

This type of project is focused on the design of digital integrated circuits using a Hardware Description Language (e.g., VHDL or Verilog). The focus is on translating algorithms into efficient hardware architectures, describing them in HDL, synthesizing and either testing them on FPGA or in an ASIC technology. Projects can focus either more on the frontend (architecture) design or include the backend implementation. The basis are typically interesting algorithms such as Communication Algorithms for 5G or high-speed data communication or algorithms for ML/AI. 

Contact: Andreas Kristensen, Yuqing Ren, Andreas Burg

Design of Embedded Memories

One of the main research areas of the lab are different types of embedded memories. In particular, TCL develops high-density embedded dynamic memories, referred to as Gain-Cell eDRAMs for standard CMOS technologies and synthesized Standard-Cell based Memories (SCMs). We offer several projects around these memory technologies. Projects on GC-eDRAMs are typically full-custom digital design projects with or without layout. Projects on SCMs are projects related to Electronic Design Automation and standard-cell based architectures. 

Contact: Andac Yigit, Andreas Burg