Implementing a Deterministic Networking Router on an FPGA


Deterministic Networking (DetNet) provides a capability to carry specified unicast or multicast data flows for real-time applications with extremely low data loss rates and bounded latency within a network domain. Use case applications includes automation systems within Industry 4.0, 5G network backbone, electricity transmission and distribution, internet of things and aviation systems. DetNet operates at the IP layer.

We are implementing a DetNet router on a NetFPGA SUME board. It is an FPGA-based open platform that aims at accelerating network protocol development.

In order reduce the packet loss ratio within a DetNet domain, PREOF (Packet Replication, Elimination and Ordering Functions) could be deployed. This mechanism distributes the contents of DetNet flows over multiple paths in time and/or space, so that the loss of some of the paths does not cause the loss of any packets.

What you will do:

Design and implement the PREOF mechanism in the DetNet router we are prototyping on the NetFPGA SUME board. Evaluate its performance through real measurements.

What you will learn:

You will participate in the design of new network protocols. You will strengthen your knowledge in network architectures. You will implement the design on an FPGA.

Required skills:

FPGA knowledge. C/C++ programming. TCP/IP knowledge is a plus.


Alaeddine EL FAWAL


RFC 8655: Deterministic Networking Architecture