HEEPocrates, a tsmc65 implementation of X-HEEP

Research Line

Systems-on-Chip

This is an implementation of X-HEEP in TSMC65 LP to demonstrate X-HEEP on Silicon. It equips the Ibex core, 256kB of SRAM, a CGRA, and few peripherals.

Keywords
#systemonchip #tsmc65 #rtl2gds #microcontroller #riscv #cgra #imc #blade

Team

  Atienza Alonso David
  Constantinescu Denisa-Andreea
  Machetti Simone
  Miranda Calero José Angel
  Müller Christoph Thomas
  Rodriguez Álvarez Rubén
  Schiavone Pasquale Davide

Research Partners

eXtendable Heterogeneous Energy-Efficient Platform - EPFL X-HEEP


X-HEEP in TSMC65 3x2 mm2 hosting a CGRA and two instances of Blade, one called Blade for testing reasons, and one coubertin attached to the bus. Preliminary results show max frequency 250MHz and 28uW/MHz at 1.2V running a matrix multiplication.

HEEPocrates Test Chip layout in TSMC 65nm LP
HEEPocrates Test Chip layout in TSMC 65nm LP



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