Research Partners
 | IMEC |
Sources of Funding
| Fvllmonti |  |
| ACCESS |  |
The high computational requirements of ML applications pose a challenge to their deployment, especially when targeting resource-constrained devices. To address it, devised a new hardware solution supporting the high degree of parallelism offered by ML algorithms and leveraging their robustness towards low-range data representation. The pipeline is optimized for parallel, small-bitwidth arithmetics, using flexible Single Instruction Multiple Data (SIMD) formats. Its small area footprint allows its integration at the periphery of memory resources. |
Related Publications
| SideDRAM: Integrating SoftSIMD Datapaths near DRAM Banks for Energy-Efficient Variable Precision Computation |
| Medina, Rafael; Biswas, Dwaipayan; Levisse, Alexandre Sébastien Julien; Yu, Pengbo; Zapater Sancho, Marina; Catthoor, Francky; Ansaloni, Giovanni; Atienza, David |
| 2025-09-01 | ACM Transactions on Embedded Computing Systems (TECS) | |  | |  | |
| DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD |
| Yu, Pengbo; Ponzina, Flavio; Levisse, Alexandre Sébastien Julien; Biswas Dwaipayan; Ansaloni Giovanni; Atienza David; Catthoor Francky |
| 2024-05-07 | 2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) | | | |
| An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs |
| Yu, Pengbo; Ponzina, Flavio; Levisse, Alexandre Sébastien Julien; Gupta Mohit
; Biswas Dwaipayan
; Ansaloni, Giovanni; Atienza Alonso, David; Catthoor Francky |
| 2024-03-05 | IEEE Transactions on Very Large Scale Integration Systems | | |
