Recent advances in CMOS-compatible single photon avalanche diodes (SPADs) have attracted great attention for a wide variety of scientific and industrial applications. Developed in CMOS in 2003, SPAD pixel size has continuously reduced and image sensor size increased. The current record is 512×512 . Achieving time-resolved SPAD sensor with high-resolution up to 1 megapixel expands its potential toward novel applications to fluorescence lifetime microscopy, automotive sensing, and 3D robotic vision.
To construct compact multi-megapixel SPAD cameras, it is crucial to investigate further miniaturization of SPAD pixels toward 3-7 µm, which can be arrayed in small sensor formats. The pixel consists of a photodiode (SPAD) and a pixel circuit. In such a case of small pixel sizes, implementing those two components into limited area results in a severe trade-off between fill factor and pixel functionality. To overcome this trade-off in the small pixels, we are investigating many promising approaches; introducing microlenses , employing 3D-stacked architecture , as well as sharing device and circuit components with neighboring pixels.
 A. C. Ulku et al., “A 512×512 SPAD Image Sensor with Built-In Gating for Phasor Based Real-Time siFLIM”, IISW 2017, R20 (2017).
 J. M. Pavia et al., “Measurement and modeling of microlenses fabricated on single-photon avalanche diode arrays for fill factor recovery”, Optics Express, 22 (2014).
 J. M. Pavia et al., “A 1 x 400 Backside-Illuminated SPAD Sensor With 49.7 ps Resolution, 30 pJ/Sample TDCs Fabricated in 3D CMOS Technology for Near-Infrared Optical Tomography”, IEEE Journal of Solid-State Circuits, 50, 10, 2406-2418 (2015).
- 3D LIDAR
- Space Imaging
- Raman Spectroscopy