Refereed conference proceedings

  1. Mohammad Javad Karimi, Soroush Mehdi, Catherine Dehollain and Alexandre Schmid, Wireless Power and Data Transceiver in a Central Implanted Unit for Biomedical Applications, IEEE Latin American Symposium on Circuits and Systems (LASCAS 2024), Punta del Este, Uruguay, February 2024. Received the IEEE CASS Travel Grant.
  2. Mohammad Javad Karimi, Junyan Qian, Catherine Dehollain, Alexandre Schmid, “Design of a Dual-Band Wireless Power and Data Transfer Coil for Multisite Biomedical Implants,” NorCAS 2023 IEEE Nordic Circuits and Systems Conference, October 2023.
  3. Mohammad Javad Karimi, Catherine Dehollain, Alexandre Schmid, “A 13.56 MHz Active Rectifier with Digitally-Assisted and Delay Compensated Comparators for Biomedical Implantable Devices,” 2023 European Solid-State Device Research & Circuits Conference, Lisbon, Portugal, September 2023.
  4. Nahid Khoshkam, Mehdi Saberi and Alexandre Schmid, High Input Impedance Front–End Amplifier for Noncontact Bio-Potential Recording, 2023 IEEE Biomedical Circuits and Systems Conference, Toronto, Canada, October 2023.
  5. Keyvan Farhang Razi and Alexandre Schmid, Digital One-Shot Charge-Balancing Method for Implantable Current-Mode Electrical Stimulation, 18th Conference on PhD Research in Microelectronics and Electronics (PRIME 2023), Valencia, SP, June 2023.
  6. Mehdi Saberi, Zahra Ghasemzadeh, and Alexandre Schmid, A Delay and Power Efficient Voltage Level Shifter with Low Leakage Power, 36th IEEE International System-on-Chip Conference, Santa Clara, CA, September, 2023
  7. Mohammad Javad Karimi, Catherine Dehollain, Alexandre Schmid, Power Feedback Control Unit for Closed-Loop Wirelessly-Powered Biomedical Implants2023 IEEE International Symposium on Circuits & Systems, ISCAS-2023, Monterey, CA, May 2023.
  8. Keyvan Farhang Razi and Alexandre Schmid, Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices, IEEE Latin American Symposium on Circuits and Systems (LASCAS 2023), Quito, Ecuador February 2023.
  9. Keyvan Farhang Razi, Raquel Ramos Garcia and Alexandre Schmid, Hardware-Friendly Random Forest Classification of iEEG Signals for Implantable Seizure Detection, 7th IEEE-EMBS Conference on Biomedical Engineering and Sciences (IECBES 2022), Kuala Lumpur, Malaysia, December 2022.
  10. Keyvan Farhang Razi, Alexandre Schmid, Computation Complexity Reduction Technique for Accurate Seizure Detection Implants, 2022 29th IEEE International Conference on Electronics, Circuits & Systems, Glasgow, UK, October, 2022.
  11. Mohammad Javad Karimi, Keyvan Farhang Razi, Catherine Dehollain, and Alexandre Schmid, Modeling and Analysis of a Wirelessly Powered Closed-Loop Implant for Epilepsy, 2022 IEEE Biomedical Circuits and Systems Conference, BioCAS 2022, Taipei, Taiwan, October 2022.
  12. Lizeth Gonzalez-Carabarin, Alexandre Schmid, Ruud J.G. van Sloun, Structured and tiled-based pruning of Deep Learning models targeting FPGA implementations, International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, May 2022.
  13. Keyvan Farhang Razi, Mohammad Javad Karimi, Catherine Dehollain, Alexandre Schmid, System-Level Modeling of a Safe Autonomous Closed-Loop Epileptic Seizure Control Implant, BioSMART 2021, Paris, Fr, and online, December 2021.
  14. Lizeth Gonzalez-Carabarin, Alexandre Schmid, Ruud J.G. van Sloun, Hardware-oriented pruning and quantization of Deep Learning models to detect life-threatening arrhythmias, 2021 IEEE Biomedical Circuits and Systems Conference, Berlin, GE, Virtual Conference, October 6-9, 2021.
  15. Keyvan Farhang Razi, Alexandre Schmid, Two-stage Hardware-friendly Epileptic Seizure detection Method with a Dynamic Feature Selection, 43rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2021, Guadalajara, Mexico, Virtual Conference, November 2021.
  16. R. Ranjandish, A. Schmid, Chopped Anodic-Phase Charge Balancing Method for Electrical Stimulation, 26th IEEE Conference on Electronics, Circuits and Systems, ICECS 2019, Genova, IT, November 2019.
  17. R. Ranjandish, A. Schmid, A 4-channel 5.04 mW 0.325 um2 Orthogonal Sampling-Based Parallel Neural Recording System, IEEE Asian Solid-State Circuits Conference 2018, A-SSCC 2018, Tainan, TW, Nov. 2018.
  18. R. Ranjandish, A. Schmid, Implantable IoT System for Closed-Loop Epilepsy Control based on Electrical Neuromodulation, VLSI-SoC 2018, 6th IFIP/IEEE International Conference on Very Large Scale Integration, Verona, Oct. 2018.
  19. R. Ranjandish, A. Schmid, Sub-µW/channel, 16-channel Seizure Detection and Signal Acquisition SoC Based on Multichannel Compressive Sensing, International Symposium on Integrated Circuits and Systems (ISICAS), Taormina, IT, September 2018.
  20. Reza Ranjandish, Kerim Ture, Franco Maloberti, Catherine Dehollain and Alexandre Schmid, All Wireless, 16-channel Epilepsy Control System with Sub-uW/channel and Closed-loop Stimulation Using a Switched-Capacitor-Based Active Charge Balancing Method, 2018 IEEE European Solid-State Circuits conference (ESSCIRC 2018), Dresden, Germany, September 2018.
  21. Reza Ranjandish, Omid Shoaei, and Alexandre Schmid, A Fully Fail-Safe Capacitive-Based Charge Metering Method for Active Charge Balancing in Deep Brain Stimulation, 14th Conference on PhD Research in Microelectronics and Electronics (PRIME 2018), Prague, Czech Republic, July 2018.
  22. R. Ranjandish, A. Schmid, An Active Charge Balancing Method Based on Chopped Anodic Phase, 14th Conference on PhD Research in Microelectronics and Electronics (PRIME 2018), Prague, Czech Republic, July 2018.
  23. R. Ranjandish, A. Schmid, Current Overshoots and Undershoots in Electrical Stimulation: a Circuit-Level Perspective of the Origin and Solutions, 2018 IEEE International Symposium on Circuits & Systems (ISCAS 2018), Florence, Italy, May 2018.
  24. R. Ranjandish, A. Schmid, An Active Charge Balancing Method Based on Anodic Current Variation Monitoring, IEEE 2017 Biomedical Circuits & Systems Conference, BioCAS, Torino, Italy, October 2017.
  25. R. Ranjandish, A. Schmid, A Compact Size Charge-Mode Stimulator Using a Low-Power Active Charge Balancing Method for Deep Brain Stimulation (DBS), IEEE 2017 Biomedical Circuits & Systems Conference, BioCAS, Torino, Italy, October 2017.
  26. K. Ture, R. Ranjandish, G. Yilmaz, S.Seiler, H. R. Widmer, A. Schmid, F. Maloberti, C. Dehollain, Power/Data Platform for High Data Rate in Implanted Neural Monitoring System. IEEE 2017 Biomedical Circuits & Systems Conference, BioCAS, Torino, Italy, October 2017.
  27. R. Ranjandish, A. Schmid, An Active Charge Balancing Method Based on Self-Oscillation of the Anodic Current, IEEE 2016 Biomedical Circuits & Systems Conference, BioCAS, Shanghai, China, October 2016.
  28. Tanibata A., Ushida M., Schmid A., Ikebe M., Asai T., and Motomura M., “A hardware cellular-automaton architecture for spatial pattern generation towards motion-vector estimation of textureless objects,” 2016 International Symposium on Nonlinear Theory and its Applications, New Welcity Yugawara, Shizuoka, Japan (Nov. 27-30, 2016).
  29. W.-Y. Hsu, A. Schmid, A Time-Based, Digitally Intensive Circuit and System Architecture for Wireless Neural Recording with High Dynamic Range, 2016 IEEE 59th Midwest Symposium on Circuits and Systems, MWSCAS 2016, Abu Dhabi, United Arab Emirates, October 2016.
  30. Reza Ranjandish, Alexandre Schmid, High Frequency Self-oscillating Current Switching for a Fully Integrated Fail-safe Stimulator Output Stage, IEEE PRIME 2016, Lisbon, Portugal, June 2016. This paper has been recognized with the 2016 PRIME Silver Leaf Award.
  31. Shoaran, Mahsa; Shahshahani, Masoud; Farivar, Masoud; Almajano, Joyel; Shahshahani, Amirhossein; Schmid, Alexandre; Bragin, Anatol; Leblebici, Yusuf; Emami, Azita, A 16-Channel 1.1mm2 Implantable Seizure Control SoC with Sub-μW/Channel Consumption and Closed-Loop Stimulation in 0.18μm CMOS, 2016 Symposium on VLSI Circuits, Honolulu, Hawaii, USA, June 2016.
  32. Marukame T., Schmid A., Bit-Flipping LDPC Under Noise Conditions and its Application to Physically Unclonable Functions, 2016 IEEE International Symposium on Circuits & Systems, Montreal, Canada, May 2016.
  33. Ueyoshi K., Marukame T., Asai T., Motomura M., and Schmid A., Memory-Error Tolerance of Scalable and Highly Parallel Architecture for Restricted Boltzmann Machines in Deep Belief Network, 2016 IEEE International Symposium on Circuits & Systems, Montreal, Canada, May 2016.
  34. Miho Ushida, Kazuyoshi Ishimura, Alexandre Schmid, Tetsuya Asai, Masato Motomura, Motion-Vector Estimation of Textureless-Objects Exploiting Reaction-Diffusion Cellular automata, 2015 International Symposium on Nonlinear Theory and its Applications (NOLTA2015), Hong Kong, China, December 2015.
  35. Miho Ushida, Kazuyoshi Ishimura, Alexandre Schmid, Tetsuya Asai and Masato Motomura, A Reaction-Diffusion Algorithm for Texture Generation to Enable Motion Vector Estimation of Textureless Objects, 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP’15), Kuala Lumpur, Malaysia, February 2015.
  36. Abdulkadir Akin, Raffaele Capoccia, Jonathan Narinx, Jonathan Masur, Alexandre Schmid, Yusuf Leblebici, Real-Time Free Viewpoint Synthesis Using Three-Camera Disparity Estimation Hardware, ISCAS 2015.
  37. Mustafa Kilic and Alexandre Schmid, An Implantable High-Voltage Cortical Stimulator for Post-stroke Rehabilitation Enhancement with High-Current Driving Capacity, ISCAS 2015.
  38. A. Akin, R. Capoccia, I. Baz, J. Narinx, A. Schmid, Y. Leblebici, Trinocular Adaptive Window Size Disparity Estimation Algorithm and Its Real-Time Hardware, 2015 VLSI-DAT, Hsinchu, TW, April 2015.
  39. Katic N., Kazi I., Tajalli A., Schmid A., Leblebici Y., A 5.43uW 0.8V Subthreshold Current-Sensing Sigma-Delta Modulator for Low-Noise Sensor Interfaces, NORCHIP 2015, Tampere, FN, October 2014.
  40. Ishimura K., Komuro T., Schmid A., Asai T., and Motomura M., “Stochastic resonance in a unidirectional network of nonlinear oscillators driven by internal noise,” 2014 International Symposium on Nonlinear Theory and its Applications, NOLTA 2014, Cinema of Bourbaki Panorama, Luzern, Switzerland, September 2014.
  41. M. Shoaran, H. Afshari, A. Schmid, A Novel Compressive Sensing Architecture for High-Density Biological Signal Recording, IEEE 2014 Biomedical Circuits and Systems Conference, Lausanne, Switzerland, October 2014.
  42. M. Shoaran, G. Yilmaz, R. Periasamy, S. Seiler, S. Di Santo, C. Pollo, K. Schindler, H.-R. Widmer, C. Dehollain, A. Schmid, In-Vivo Validation of a Compact Inductively-Powered Neural Recording Interface, IEEE 2014 Biomedical Circuits and Systems Conference, Lausanne, Switzerland, October 2014.
  43. N. Katic, A. Schmid, Y. Leblebici, CMOS-Integrated Photodetectors for Neuromorphic and Smart Imaging Applications: a Low-Cost Design and Measurement Method, IEEE SENSORS 2014, Valencia, Spain, November 2014.
  44. N. Katic, A. Schmid, Y. Leblebici, A Retina-Inspired Robust On-Focal-Plane Multi-Band Edge Detection Scheme for CMOS Image Sensors, IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, August 2014.
  45. H. Liu, M. Shoaran, A. Schmid, S. Datta, V. Narayanan, Tunnel FET-based Ultra-low Power, Low-noise Amplifier Design for Bio-signal Acquisition, International Symposium on Low Power Electronics and Design, ISLPED 2014, La Jolla, CA, August 2014.
  46. V. Majidzadeh, A. Schmid, Y. leblebici, A 16-Channel, 359 uW, Parallel Neural Recording System Using Walsh-Hadamard Coding, IEEE Custom Integrated Circuit Conference CICC, San Jose, CA, September 2013.
  47. Kazuyoshi Ishimura, Alexandre Schmid, Tetsuya Asai, Masato Motomura, Image Steganography Based on Hardware-Oriented Reaction-Diffusion Models, 2013 International Symposium on Nonlinear Theory and its Applications (NOLTA2013), Santa Fe, NM, September 2013.
  48. Abdulkadir Akin, Ipek Baz, Luis Manuel Gaemperle, Alexandre Schmid and Yusuf Leblebici, Compressed Look-Up-Table based Real-Time Rectification Hardware, 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, Turkey, October 2013.
  49. Kazuyoshi Ishimura, Alexandre schmid, Tetsuya Asai, and Masato Motomura, Image Steganography on Digital Reaction-Diffusion Processor, Nonlinear Dynamics of Electronic Systems, NDES 2013, Bari, IT, July 2013.
  50. N. Katic, M. H. Kamal, M. Kilic, A. Schmid, P. Vandergheynst, Y. Leblebici, Power-Efficient CMOS Image Acquisition System based on Compressive Sampling, IEEE International Midwest Symposium on Circuits and Systems (IEEE MWSCAS 2013), Columbus, OH, August 2013.
  51. N. Katic, M. H. Kamal, M. Kilic, A. Schmid, P. Vandergheynst, Y. Leblebici, Column-Separated Compressive Sampling Scheme for Low Power CMOS Image Sensors, IEEE International NEWCAS Conference, Paris, FR, June 2013.
  52. M. H. Kamal, M. Shoaran, Y. Leblebici, A. Schmid, P. Vandergheynst, Compressive Multichannel Cortical Signal Recording, IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2013, Vancouver, CA, May 2013.
  53. V. Popovic, K. Seyid, A. Schmid, Y. Leblebici, Real-Time Hardware Implementation of Multi-Resolution Image Blending, IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2013, Vancouver, CA, May 2013.
  54. A. Akin, I. Baz, H. B. Atakan, I. Boybat, A. Schmid. Y. Leblebici, A Hardware-Oriented Dynamically Adaptive Disparity Estimation Algorithm and its Real-Time Hardware, GLSVLSI 2013, Paris, France, May 2013.
  55. N. Katic, H. K. Mahdad, A. Schmid, P. Vandergheynst, Y. Leblebici, High Frame-Rate Low-Power Compressive Sampling CMOS Image Sensor Architecture, GLSVLSI 2013, Paris, France, May 2013.
  56. Mahsa Shoaran, Mariazel Maqueda Lopez, Vijaya Sankara Rao Pasupureddi, Yusuf Leblebici and Alexandre Schmid, A Low-Power Area-Efficient Compressive Sensing Approach for Multi-Channel Neural Recording, 2013 IEEE International Symposium on Circuits and Systems, Beijing, China, May 2013.
  57. Vladan Popovic, Hossein Afshari, Alexandre Schmid, Yusuf Leblebici, Real-time Implementation of Gaussian Image Blending in a Spherical Light Field Camera, 2013 IEEE International Conference on Industrial Technology (ICIT 2013), Cape Town, South Africa, February 2013.
  58. H. Afshari, A. Akin, V. Popovic, A. Schmid, Y. Leblebici, Real-Time FPGA Implementation of Linear Blending Vision Reconstruction Algorithm Using a Spherical Light Field Camera, IEEE Workshop on Signal Processing Systems, SiPS 2012, Québec, CA, October 2012. This paper has been recognized with the Best student’s paper award.
  59. M. Shoaran, C. Pollo, Y. Leblebici, A. Schmid, Design Techniques and Analysis of High-Resolution Neural Recording Systems Targeting Epilepsy Focus Localization, 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2012, San Diego, CA, August 2012.
  60. A. Akin, E. Erdede, H. Afshari, A. Schmid and Y. Leblebici, Enhanced Omnidirectional Image Reconstruction Algorithm and its Real-Time Hardware, 15th EUROMICRO Conference on Digital System Design (DSD), Izmir, Turkey, September 2012.
  61. Hossein Afshari, Kerem Seyid, Alexandre Schmid, and Yusuf Leblebici, Design and Implementation of Multi-camera Systems Distributed over a Spherical Geometry, 7th International Conference on the Theory and Application of Diagrams, Canterbury, UK, July 2-6, 2012, Proceedings, Cox, Philip T.; Plimmer, Beryl; Rodgers, Peter (Eds.), Springer, Lecture Notes in Computer Science, 7352, 2012.
  62. V. Majidzadeh, A. Schmid, Y. Leblebici, J. Rabaey, An 8-PPM, 13.9 pJ/b UWB transmitter with reduced number of PA elements, 2012 Symposium on VLSI Circuits, Honolulu, HW, June 2012.
  63. D. Garetto, D. Rideau, F. Gilibert, A. Schmid, H. Jaouen, and Y. Leblebici, Surface potential compact model of embedded flash devices oriented to IC memory design, International Conference on Ultimate Integration on Silicon, ULIS 2012, Grenoble, France, March 2012.
  64. V. Majidzadeh, A. Schmid, Y. Leblebici, A 16-Channel 220 uW Neural Recording IC with Embedded Delta Compression, 2011 IEEE Biomedical Circuits & Systems Conference, San Diego, CA, November, 2011.
  65. D. Garetto, D. Rideau, C. Tavernier, Y. Leblebici, A. Schmid, and H. Jaouen, Advanced physics for simulation of ultrascaled devices with UTOXPP Solver, TechConnect World Conference and Expo 2011, Nanotech 2011, Boston, MA, June 2011.
  66. H. Afshari, L. Jacques, L. Bagnato, A. Schmid, P. Vandergheynst, Y. Leblebici, Hardware Implementation of an Omnidirectional Camera with Real-Time 3D Imaging Capability, 3DTV Conference 2011, Antalya, Turkey, May 2011.
  67. D. Garetto, A. Zaka, J.-P. Manceau, D. Rideau, E. Dornel, W. F. Clark, A. Schmid, H. Jaouen, Y. Leblebici, Characterization, analysis and physical modeling of transient and endurance mechanisms in embedded non-volatile nanoscale technology, Third IEEE International Memory Workshop (IMW), Monterey, CA, May 2011.
  68. D. Garetto, Y. M. Randriamihaja, A. Zaka, D. Rideau, A. Schmid, H. Jaouen, Y. Leblebici, AC analysis of defect cross-sections using non-radiative MPA quantum model, Ultimate Integration on Silicon, ULIS 2011, Cork, IR, March 2011.
  69. Neil Joye, Alexandre Schmid, Yusuf Leblebici, Extracellular Recording System based on Amplitude Modulation for CMOS Microelectrode Arrays, Biomedical Circuits and Systems Conference, IEEE BioCAS 2010, Paphos, Cyprus, November 2010.
  70. D. Garetto, Y. M. Randriamihaja, D. Rideau, E. Dornel, W. F. Clark, A. Schmid, V. Huard, H. Jaouen, Y. Leblebici, Small signal analysis of electrically-stressed oxides with Poisson-Schroedinger based multiphonon capture model, 14th International Workshop on Computational Electronics, IWCE 2010, Pisa, IT, October 2010.
  71. M. Stanisavljevic, A. Schmid, Y. Leblebici, Output Probability Density Functions of Logic Circuits: Modeling and Fault-Tolerance Evaluation, International Conference on VLSI and System on Chip, VLSI-SOC 2010, Madrid, Spain, September 2010.
  72. S. Hashemi, N. Joye, A. Schmid, Y Leblebici, Very High Density Microelectrode Array with Monolithically Integrated Readout Circuits, 6th Conference on Ph.D. Research in Microelectronics & Electronics, IEEE-PRIME 2010, Berlin, Germany, July 2010. This paper has been recognized with the Silver Leaf Award.
  73. Neil Joye, Alexandre Schmid, Yusuf Leblebici, AM Modulation-based CMOS Readout Circuit for High-density Microelectrode Arrays, 7th International Meeting on Substrate-Integrated Microelectrode Arrays, MEA Meeting 2010, Reutlingen, Germany, June 2010.
  74. Neil Joye, Michelangelo Carrozzo, Alexandre Schmid, Yusuf Leblebici, Delta Compression of Neural Recordings for High-density CMOS-based Microelectrode Arrays, 7th International Meeting on Substrate-Integrated Microelectrode Arrays, MEA Meeting 2010, Reutlingen, Germany, June 2010.
  75. V. Mahidzadeh, L. Jacques, A. Schmid, P. Vandergheynst, Y. Leblebici, A (256×256) Pixel 76.7mW CMOS Imager/Compressor Based on Real-Time In-Pixel Compressive Sensing, IEEE International Symposium on Circuits and Systems, ISCAS 2010, Paris, France, May 2010.
  76. M. Stanisavljevic, A. Schmid, Y. Leblebici, Selective Redundancy-Based Design Techniques for the Minimization of Local Delay Variations, IEEE International Symposium on Circuits and Systems, ISCAS 2010, Paris, France, May 2010.
  77. D. Garetto, D. Rideau, E. Dornel, W. F. Clark, C. Tavernier, Y. Leblebici, A. Schmid and H. Jaouen, Modeling study of capacitance characteristics in stained High-K Metal gate technology: impact of Si/SiO2/HK interfacial layer and band structure model, Nanotech 2010, Annaheim, CA, June, 2010.
  78. M. Stanisavljevic, A. Schmid, Y. Leblebici, Fault-Tolerance and Reliability of Post-CMOS Systems: a Circuit Perspective, invited, 2009 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2009, Kanazawa, Japan, December 2009.
  79. D. Garetto, E. Dornel, S. Hniki, D. Rideau, W. F. Clark, A. Schmid, C. Tavernier, H. Jaouen, Y. Leblebici, Analytical and compact models of the ONO capacitance in embedded non-volatile flash devices, European Solid-State Devices and Technologies Conference, ESSDERC/ESSCIRC Fringe Poster Session, Athens, Greece, September 2009.
  80. M. Stanisavljevic, A. Schmid, Y. Leblebici, Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth, Fourth International Conference on Nano-Nets, Nano-Net 2009, Lucerne, Switzerland, October 2009.
  81. M. Stanisavljevic, A. Schmid, Y. Leblebici, Optimization of Nanoelectronic Systems Reliability under Massive Defect Density Using Distributed R-Fold Modular Redundancy, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT, Chicago, IL, October 2009.
  82. Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici, A Micropower Neural Recording Amplifier with Improved Noise Efficiency Factor, European Conference on Circuit Theory and Design, ECCTD, Antalya, Turkey, August 2009.
  83. N. Joye, A. Schmid, Y. Leblebici, A Cell-Electrode Interface Noise Model for High-Density Microelectrode Arrays, Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC, Minneapolis, MN, September 2009.
  84. Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici, A Fully On-Chip LDO Voltage Regulator for Remotely Powered Cortical Implants, European Solid-State Circuits Conference, ESSCIRC, Athens, Greece, September 2009.
  85. D. Garetto, A. Zaka, V. Quenette, D. Rideau, E. Dornel, W.F. Clark, M. Minondo, C. Tavernier, Q. Rafhay, R. Clerc, A. Schmid, Y. Leblebici, H. Jaouen, Embedded non–volatile memory study with surface potential based model, 2009 Workshop on Compact Modeling, Houston, TX, May 2009.
  86. Kikombo A.K., Asai T., Oya T., Schmid A., Leblebici Y., and Amemiya Y., A pulse-density modulation circuit exhibiting noise shaping with single-electron neurons, 2009 International Joint Conference on Neural Networks, Atlanta, GA, June 2009.
  87. L. Jacques, P. Vandergheynst, A. Bibet, V. Majidzadeh, A. Schmid, Y. Leblebici, CMOS Compressed Imaging by Random Convolutions, IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2009, Taipei, Taiwan, April 2009.
  88. Kikombo A. K., Schmid A., Asai T., Leblebici Y., and Amemiya Y., Fault-tolerant architectures for nanoelectronic circuits employing simple feed-forward neural networks without learning, The 15th International Conference on Neural Information Processing of the Asia-Pacific Neural Network Assembly, Auckland, New Zealand, November 2008.
  89. N. Joye, A. Schmid, Y. Leblebici, An Electrical Model of the Cell-Electrode Interface for High-density Microelectrode Arrays, 30th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, Vancouver, Canada, August, 2008.
  90. N. Joye, A. Schmid, Y. Leblebici, Three-Dimensional Silicon-Based MEA with High Spatial Resolution, 6th International Meeting on Substrate-Integrated Micro Electrode Arrays, Reutlingen, Germany, July 2008.
  91. Kikombo A. K., Schmid A., Asai T., Leblebici Y., and Amemiya Y., Implementation of early vision model for edge extraction with single-electron devices,12th International Conference on Cognitive and Neural Systems, Boston, MA, May 2008.
  92. C. Guiducci, A. Schmid, F. K. Gürkaynak, Y. Leblebici, Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces, Design Automation and Test in Europe 2008, pages 1328-1333, 2008.
  93. Schmid, A., Stanisavljevic, M., Leblebici Y., Bio-Inspired Circuit Architectures to Guarantee Functional Operation of Systems Built of Unreliable Components, Material Research Society Spring Meeting 2008, San Francisco, CA, March 2008.
  94. Kikombo A. K., Schmid A., Asai T., Leblebici Y., and Amemiya Y., Toward a single-electron image processor for edge detection based on the inner retina model, 2008 RISP International Workshop on Nonlinear Circuits and Signal Processing, Gold Coast, Australia, March 2008.
  95. Kikombo A.K., Schmid A., Leblebici Y., Asai T., and Amemiya Y., A Bio-Inspired Image Processor for Edge Detection with Single-Electron Circuits, International Semiconductor Device Research Symposium, College Park, MD, December 2007.
  96. M. Stanisavljevic, F. K. Gürkaynak, A. Schmid, Y. Leblebici, M. Gabrani, A 90nm CMOS Cryptographic Core with Improved Fault-Tolerance in Presence of Massive Defect Density, Nano-Nets 2007, International Conference on Nano-Networks, Catania, Italy, September 2007.
  97. N. Joye, M. Lavagnino, A. Schmid, Y. Leblebici, Three-Dimensional Tip Electrode Array Technology for High Resolution Neuro-Electronic Systems used in Electrophysiological Experiments in-vitro, First International Conference on Nano/Molecular Medicine and Engineering IEEE-Nanomed, Macao, China, August 2007.
  98. N. Joye, A. Schmid, Y. Leblebici, T. Asai, Y. Amemiya, Fault Tolerant Logic Gates Using Neuromorphic CMOS Circuits, 3rd Conf. on Ph.D. Research in Microelectronics and Electronics PRIME, Bordeaux, France, June 2007.
  99. M. Stanisavljevic, F. K. Gürkaynak, A. Schmid, Y. Leblebici, M. Gabrani, Case Study of Fault-Tolerant Architectures for 90nm CMOS Crythographic Cores, 3rd Conf. on Ph.D. Research in Microelectronics and Electronics PRIME, Bordeaux, France, June 2007.
  100. M. Vural, A. Ozgur, A. Schmid, Y. Leblebici, Fault Tolerance of Feed-Forward Artificial Neural Network Architectures Targeting Nano-Scale Implementations, IEEE International Midwest Symposium on Circuits and Systems MWSCAS 2007, Montréal, Canada, August 2007.
  101. Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani, Design and Realization of a Fault-Tolerant 90nm CMOS Cryptographic Engine Capable of Performing under Massive Defect Density, 17th ACM Great Lakes Symposium on VLSI (GLSVLSI), Stresa, Italy, November 2006.
  102. Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Desing for Reliability of Nanometer-Scale Electronics under High Defect Density, Nanoelectronic Days 2006, Aachen, Germany, October 2006.
  103. M. Stanisavljevic, A. Schmid and Y. Leblebici, Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits under Massive Defect Density, IJCNN 2006, Vancouver, BC, July 2006.
  104. S. Ecoffey, M. Mazza, V. Pott, D. Bouvet, A. Schmid, Y. Leblebici, M. J. Declercq and A. Ionescu, “A New Logic Family Based on Hybrid MOSFET-Polysilicon Nano-Wires,” IEDM 2005, Washington, DC.
  105. Milos Stanisavljevic, Vineet Abhishek, Alexandre Schmid and Yusuf Leblebici, “A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on A-Priori Functional Fault-Tolerance Analysis,” IFIP International Conference on Very Large Scale Integration VLSI-SOC 2005, Perth, AU, October 2005.
  106. Milos Stanisavljevic, Alexandre Schmid and Yusuf Leblebici, “Analysis of Nano-Scale Circuits and Systems Reliability Based on A-Priory Statistical Fault-Modeling Methodology,” IEEE International Midwest Symposium on Circuits and Systems MWSCAS 2005, Cincinnati, OH, August 2005.
  107. S. Cotofana, A. Schmid, Y. Leblebici, A. Ionescu, O. Stoffke, P. Zipf, M. Glesner, and A. Rubio, CONAN – A Design Exploration Framework for Reliable Nano-Electronics Architectures, 17th International Conference on Application-Specific Systems, Architecture and Processors, ASAP 2005, Samos, Greece, pp. 260-267, July 2005.
  108. Neil Joye, Alexandre Schmid, Tetsuya Asai and Yusuf Leblebici, Fault-Tolerant Logic Gates with Neuromorphic CMOS Circuits, Ninth International Conference on Cognitive and Neural Systems, Boston, MA, May 2005, II-#29.
  109. Takahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya, Single-Electron Circuit for Inhibitory Spiking Neural Network with Fault-Tolerant Architecture, IEEE International Symposium on Circuits and Systems ISCAS’05, Kobe, Japan, May 2005.
  110. Serge Ecoffey, Vincent Pott, Marco Mazza, Alexandre Schmid, Yusuf Leblebici, Michel J. Declercq, Adrian Ionescu, Nanowire for Room Temperature Operated Hybrid CMOS-‘NANO’ Integrated Circuits, IEEE ISSCC’05, San Francisco, CA, February 2005.
  111. A. Schmid and Y. Leblebici, A Highly Fault Tolerant PLA Architecture for Failure-Prone Nanometer CMOS and Novel Quantum Device Technologies, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems DFT’04, Cannes, France, October 2004.
  112. A. Schmid and Y. Leblebici, A Highly Fault-Tolerant PLA Architecture for Realization of Boolean Functions Using Failure-Prone Nanometer-Scale Device Technologies, IEEE International Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004.
  113. A. Schmid and Y. Leblebici, Regular Array of Nanometer-Scale Devices Performing Logic Operations with Fault-Tolerant Capability, Fourth IEEE Conference on Nanotechnology IEEE-NANO, München, Germany, August 2004.
  114. A. Schmid and Y. Leblebici, Fault-Tolerant PLA-Style Circuit Design for Failure-Prone Nanometer CMOS and Quantum Device Technologies, 2004 International Joint Conference on Neural Networks IJCNN, July 2004, Budapest.
  115. A. Schmid and Y. Leblebici, Robust and Fault-Tolerant Circuit Design for Nanometer-Scale Devices and Single-Electron Transistors, 2004 IEEE International Symposium on Circuits and Systems, May 2004, Vancouver, BC.
  116. S. Badel, A. Schmid and Y. Leblebici, Mixed Analog-Digital Image Processing Cicuit Based on Hamming Artificial Neural Network Architecture, 2004 IEEE International Symposium on Circuits and Systems, May 2004, Vancouver, BC.
  117. S. Mahapatra, V. Pott, S. Ecoffey, A. Schmid, C. Wasshuber, K. Banerjee, Y. Leblebici, M. Declercq, J.W. Tringe and A.M. Ionescu, SETMOS: A Novel True Hybrid SET-CMOS High Current Coulomb Blockade Oscillation Cell for Future Nano-Scale Analog ICs, 2003 IEEE International Electron Devices Meeting, Washington DC, December 2003.
  118. Alexandre Schmid and Yusuf Leblebici, Robust Circuit and System Design Methodologies for Nanometer-Scale Devices and Single-Electron Transistors, Third IEEE Conference on Nanotechnology IEEE-NANO, San Francisco, CA, August 2003.
  119. Alexandre Schmid and Yusuf Leblebici, A Modular Approach for Reliable Nanoelectronic and Very-Deep Submicron Circuit Design Based on Analog Neural Network Principles, Third IEEE Conference on Nanotechnology IEEE-NANO, San Francisco, CA, August 2003.
  120. Stéphane Badel, Alexandre Schmid, and Yusuf Leblebici, A VLSI Hamming Artificial Neural Network with k-Winner-Take-All and k-Loser-Take-All Capability, International Joint Conference on Neural Networks IJCNN, Portland, OR, July 2003.
  121. Stéphane Badel, Alexandre Schmid and Yusuf Leblebici, VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications, European Symposium on Artificial Neural Networks ESANN, Bruges, Belgium, April 2003.
  122. Horia-Nicolai Teodorescu, Daniel Mlynek, Lakhmi Jain, Abraham Kandel, Alexandre Schmid, Xavier Peillon, Errors in Fuzzy Hardware for Control and Decision Systems, 1999 European Control Conference ECC’99, Karlsruhe, Germany, August 1999.
  123. R. Baumgartner, A. Schmid, D. Bowler and Y. Leblebici, A Novel Capacitive Circuit Architecture for Compact Realization of Flash Analog-Digital Converters, European Conference on Circuit Theory and Design ECCTD’99, Stresa, Italy, August 1999.
  124. Alexandre Schmid, Yusuf Leblebici, Daniel Mlynek, A Two-Stage Charge-Based Analog/Digital Neuron Circuit with Adjustable Weights, Proceedings of the 1999 International Joint Conference on Neural Networks IJCNN’99, Washington, DC, July 1999.
  125. A. Schmid, D. Bowler, R. Baumgartner and Y. Leblebici, A Novel Analog-Digital Flash Converter Architecture Based on Capacitive Threshold Gates, Proceedings of the 1999 IEEE International Symposium on Circuits and Systems ISCAS’99, Orlando, FL, May 1999.
  126. Alexandre Schmid, Yusuf Leblebici and Daniel Mlynek, Hardware Realization of a Hamming Neural Network with On-Chip Learning, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems ISCAS’98, Monterey, CA, June 1998.
  127. Alexandre Schmid, Yusuf Leblebici and Daniel Mlynek, A Charge-based Artificial Neural Network with On-Chip Learning Ability, Proceedings of the 5th European Congress on Intelligent Techniques and Soft Computing EUFIT’97, Aachen, Germany, September 1997.
  128. Laurent Chaouat, Alexandre Schmid, Alain Vachoux, Daniel Mlynek, Case-Based Synthesis of Telecommunication Architectures, VHDL-USER’s Forum in Europe, SIG-VHDL Spring’97 Working Conference, Toledo, Spain, April 1997.
  129. Laurent Chaouat, Alexandre Schmid, Alain Vachoux, Daniel Mlynek, Generating Telecommunication Architectures in the Mentor Graphics DSP Station Environment, First Annual Mentor Graphics Alpine Local Users Group Conference ALPSLUG’96, Neuchâtel, Switzerland, September 1996.