For many years, Prof. John Thome of the Institute of Mechanical Engineering pioneered the use of heat sensing technology, and collaborated with Prof. David Atienza of the Institute of Electrical Engineering to model ways in which 3D chips could be cooled efficiently, using techniques like micro-channels of liquids. This work has been further developed as actual products by Prof. Elison Matioli, and EPFL spin-off Corintis.
Prof. David Atienza, head of the Embedded Systems Lab (ESL), is continuing to explore this important technology. He has just completed a twenty-year survey of power and thermal modelling and management with the help of his ESL team members, which was published in IEEE Design & Test this month. ESL is developing a new thermal modelling emulator with more capabilities than have been seen thus far.
The survey was performed in collaboration with Guest Prof. Luis Costero, Dr. Darong Huang and PhD candidate Kai Zhu. As well as providing a detailed history of the technology, which has seen a lot of changes in the last twenty years, the authors were able to make predictions about future trends and challenges.
Emulators are vital to future chip designs in the generative AI era of computing. In the same way that Formula 1 teams use virtual models (or digital twins) of their cars — a less expensive and time-consuming process than testing an actual car over and over — chip developers need to be able to test a digital version of their new AI chips before sending them for manufacture.
The modelling of power, thermal, and cooling techniques remains key in the development of new strategies, according to the new survey. It is also vital to be able to model the electrical, mechanical and thermal effects which 3D chips will endure, and to include complex chips such as 3D MPSoCs (Multi-Processor Systems on Chips).
Back in 2012, Atienza’s laboratory unveiled the 3D-ICE thermal emulator — the first of its kind for micro-channels of liquid cooling. 3D-ICE is still going strong, and forms the basis for the latest version, 3D-ICE 4.0, which Atienza, Huang and Zhu presented at last month’s EcoCloud Annual Event. It promises to be a game changer for next-generation 2.5D, 3D, and wafer-scale technologies.
“We include analysis of a very careful material distribution, over different layers,” explains Kai Zhu. “We also examine resistance and heat gradients over different layers with differing materials.” This is a vital new development, since many other researchers (such as Andras Kis and Adrian Ionesco) are pioneering the use of other materials beyond simple silicon.
“We also have a feature for multi-thread acceleration,” adds Dr. Huang, “with more efficient and precise simulation.”
As chips themselves get more complicated, so too must their emulators!
“Being able to rapidly (and very accurately) model thermal spreading and propagation in complex 3D stacks is incredibly important work in terms of finding ways to lower overall energy consumption in complex chipsets, for both cooling and computing,” explains Prof. Atienza. “Manufacturers need solutions to control the heat surge in 3D many-core computing systems for generative AI workloads, but only researchers who fully understand computing engineering co-design (hardware and software co-optimization) and what is possible on the cooling side (single- and two-phase cooling, in-package many-fold capillary cooling, etc.) can forge new paths in the right direction.”
3D chip technology is alive and well. It is evolving quickly, due to the need for generative AI computing, and EPFL researchers are at the cutting edge, as they have been since its inception.
Kai Zhu and Dr. Darong Huang present their work at the EcoCloud Annual Event