Data Acquisition

The block diagram of the data acquisition system is given in the figure bellow:

/webdav/site/la/users/139973/public/EJC Benchmark/sus_data_acq.gif

Open-loop operation

The real-time experiments have been performed with different PRBS signals, for the primary and secondary path. The sampling frequency was Fs= 800 Hz. The data obtained are available bellow:

Primary path

– 10-bit shift register, with a clock frequency of Fs and data length 8000: data_prim1.mat
– 10-bit shift register, with a clock frequency of Fs/2 and data length 8000: data_prim2.mat

The input-output data obtained in real-time experiment where the input was a sinusoid with the frequency of 32 Hz are also available: sin32_prim.mat

Secondary path

– 10-bit shift register, with a clock frequency of Fs and data length 20000: data_sec1.mat
– 10-bit shift register, with a clock frequency of Fs/2 and data length 4096: data_sec2.mat
– 9-bit shift register, with a clock frequency of Fs/3 and data length 2048: data_sec3.mat
– 9-bit shift register, with a clock frequency of Fs/4 and data length 4096: data_sec4.mat

Note: The files may be downloaded by clicking on “file_name” with the right button of your mouse and choosing “save link as (Netscape)/download link to disk (Internet Explorer)” option. A compressed version of all files is available in the file: data.zip.