All Publications

Journal Articles

2018

Execution Trace Graph of Dataflow Process Networks

S. Casale-Brunet; M. Mattavelli 

Ieee Transactions On Multi-Scale Computing Systems. 2018-07-01. Vol. 4, num. 3, p. 340-354. DOI : 10.1109/TMSCS.2018.2790921.

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs

M. Michalska; S. Casale-Brunet; E. Bezati; M. Mattavelli 

IEEE Transactions on Multi-Scale Computing Systems. 2018. Vol. 4, num. 2, p. 127-140. DOI : 10.1109/TMSCS.2017.2774294.

2017

Stand-Alone Stretchable Absolute Pressure Sensing System for Industrial Applications

Y. Guo; S. Schütz; A. Vaghi; Y-H. Li; Z. Guo et al. 

IEEE Transactions on Industrial Electronics. 2017. Vol. 64, num. 11, p. 8739-8746. DOI : 10.1109/TIE.2017.2701763.

Smart Contact Lenses and Eye Implants Could Provide Medical Insights

D. R. Barrettino 

IEEE Spectrum. 2017. Vol. 54, p. 38-43.

2016

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs

E. Bezati; S. Casale-Brunet; M. Mattavelli; J. W. Janneck 

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2016-08-02. Vol. 36, num. 4, p. 699-703. DOI : 10.1109/TCAD.2016.2597215.

On the Development and Optimization of HEVC Video Decoders Using High-Level Dataflow Modeling

K. Jerbi; H. Yviquel; A. Sanchez; D. Renzi; D. J. De Saint Jorre et al. 

Journal of Signal Processing Systems. 2016-03-05. Vol. 87, num. 1, p. 127-138. DOI : 10.1007/s11265-016-1113-x.

Comparison of high-throughput sequencing data compression tools

I. Numanagic; J. K. Bonfield; F. Hach; J. Voges; J. Ostermann et al. 

Nature Methods. 2016. Vol. 13, p. 1005-1008. DOI : 10.1038/nmeth.4037.

Performance Estimation Based Multicriteria Partitioning Approach for Dynamic Dataflow Programs

M. Michalska; N. Zufferey; M. Mattavelli 

Journal Of Electrical And Computer Engineering. 2016.  p. 8536432. DOI : 10.1155/2016/8536432.

2015

Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques. Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies

C. Massimo; S. Casale Brunet; E. Bezati; M. Mattavelli; J. Janneck 

Journal of Signal Processing Systems. 2015.  p. 1-11. DOI : 10.1007/s11265-015-1083-4.

Automated Design Flow for Multi-Functional Dataflow-Based Platforms

C. Sau; P. Meloni; L. Raffo; F. Palumbo; E. Bezati et al. 

Journal of Signal Processing Systems -Signal Image and Video Technology-. 2015.  p. 1-23. DOI : 10.1007/s11265-015-1026-0.

Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs

A. Prihozhy; E. Bezati; A. A-H. Ab Rahman; M. Mattavelli 

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2015.  p. 1-1. DOI : 10.1109/TCAD.2015.2427278.

Actor Merging for Dataflow Process Networks

J. Boutellier; J. Ersfolk; J. Lilius; M. Mattavelli; G. Roquier et al. 

Ieee Transactions On Signal Processing. 2015. Vol. 63, num. 10, p. 2496-2508. DOI : 10.1109/Tsp.2015.2411229.

2014

A Multidisciplinary Approach for Model Predictive Control Education: A Lego Mindstorms NXT-based Framework

M. Canale; S. Casale-Brunet 

International Journal Of Control Automation And Systems. 2014. Vol. 12, num. 5, p. 1030-1039. DOI : 10.1007/s12555-013-0282-7.

High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms

E. Bezati; R. Thavot; G. Roquier; M. Mattavelli 

Journal Of Real-Time Image Processing. 2014. Vol. 9, num. 1, p. 251-262. DOI : 10.1007/s11554-013-0326-5.

2013

Methods to explore design space for MPEG RMC codec specifications

S. Casale-Brunet; A. Elguindy; E. Bezati; R. Thavot; G. Roquier et al. 

Signal Processing-Image Communication. 2013. Vol. 28, num. 10, p. 1278-1294. DOI : 10.1016/j.image.2013.08.012.

Reconfigurable media coding: An overview

E. S. Jang; M. Mattavelli; M. Preda; M. Raulet; H. Sun 

Signal Processing-Image Communication. 2013. Vol. 28, num. 10, p. 1215-1223. DOI : 10.1016/j.image.2013.08.008.

Scalable Media Coding Enabling Content-Aware Networking

M. Grafl; C. Timmerer; H. Hellwagner; G. Xilouris; G. Gardikis et al. 

IEEE Multimedia. 2013. Vol. 20, num. 2, p. 30-41. DOI : 10.1109/MMUL.2012.57.

Secure Computing with the MPEG RVC Framework

J. J. Ahmad; S. Li; R. Thavot; M. Mattavelli 

Signal Processing-Image Communication. 2013. Vol. 28, num. 10, p. 1315-1334. DOI : 10.1016/j.image.2013.08.015.

2012

Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs

G. Roquier; E. Bezati; M. Mattavelli 

Journal of Electrical and Computer Engineering, Special issue on "ESL Design Methodology". 2012.  p. 2. DOI : 10.1155/2012/484962.

Conference Papers

2019

Composite Data Types in Dynamic Dataflow Languages as Copyless Memory Sharing Mechanism

A. Bloch; E. Bezati; M. Mattavelli 

2019-06-08. Computational Science – ICCS 2019. p. 717-724. DOI : 10.1007/978-3-030-22750-0_70.

Toward a Dynamic Threshold for Quality-Score Distortion in Reference-Based Alignment

A. A. Hernandez-Lopez; C. Alberti; M. Mattavelli 

2019. 15th International Symposium on Bioinformatics Research and Applications (ISBRA), Barcelona, Spain, June 3–6, 2019.

2018

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs

A. Modas; S. Casale-Brunet; R. Stewart; E. Bezati; J. Ahmad et al. 

2018-01-01. IEEE International Workshop on Signal Processing Systems (IEEE SiPS), Cape Town, SOUTH AFRICA, Oct 21-24, 2018. p. 263-268.

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines

A. Prihozhy; S. Casale-Brunet; E. Bezati; M. Mattavelli 

2018-01-01. IEEE International Workshop on Signal Processing Systems (IEEE SiPS), Cape Town, SOUTH AFRICA, Oct 21-24, 2018. p. 337-342.

High Precision Capacitive Moisture Sensor for Polymers

R. M. Dos Santos; J-M. Sallese; M. Mattavelli; C. Dehollain; D. Barrettino 

2018-01-01. 17th IEEE SENSORS Conference, New Delhi, INDIA, Oct 28-31, 2018. p. 212-215.

Lossy compression of quality scores in differential gene expression: A first assessment and impact analysis

A. A. Hernandez Lopez 

2018. Data compression conference (DCC) , Snowbird, Utah, March 27-30, 2018.

2017

Design space exploration of dataflow-based Smith-Waterman FPGA implementations, 2017 IEEE International Workshop on Signal Processing Systems (SiPS)

S. Casale-Brunet; E. Bezati; M. Mattavelli 

2017-10-03. Signal Processing Systems (SiPS), 2017 IEEE International Workshop on. p. 1-6. DOI : 10.1109/SiPS.2017.8109982.

Performance estimation of program partitions on multi-core platforms, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

M. Michalska; J. J. Ahmad; E. Bezati; S. Casale-Brunet; M. Mattavelli 

2017-09-21.  p. 1-8. DOI : 10.1109/PATMOS.2016.7833418.

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms, 2017 25th European Signal Processing Conference (EUSIPCO)

M. Michalska; E. Bezati; S. Casale-Brunet; M. Mattavelli 

2017-08-28.  p. 1339-1343. DOI : 10.23919/EUSIPCO.2017.8081426.

High level synthesis of Smith-Waterman dataflow implementations, 2017 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)

S. Casale-Brunet; E. Bezati; M. Mattavelli 

2017-03-05.  p. 1173-1177. DOI : 10.1109/ICASSP.2017.7952341.

Real-Time Monitoring of the Hydration Level by Multi-Frequency Bioimpedance Spectroscopy

D. Allegri; D. Vaca; D. Ferreira; M. Rogantini; D. R. Barrettino 

2017. IEEE International Instrumentation and Measurement Technology Conference, Torino, Italy, May 22-25, 2017. p. pp. 1-6.

MPEG-G the emerging standard for genomic data compression

M. Hernaez; C. Alberti; M. Mattavelli; I. Ochoa 

2017. Rocky 2017 Bioinformatics Conference, Aspen, Colorado, USA, December 7-9, 2017.

Differential gene expression with lossy compression of quality scores in RNA-seq data

A. A. Hernandez-Lopez; J. Voges; C. Alberti; M. Mattavelli; J. Ostermann 

2017. Data Compression Conference (DCC), Snowbird, UT, APR 04-07, 2017. p. 444-444. DOI : 10.1109/Dcc.2017.75.

2016

Trace-based manycore partitioning of stream-processing applications, 2016 50th Asilomar Conference on Signals, Systems and Computers

M. Michalska; S. Casale-Brunet; E. Bezati; M. Mattavelli; J. Janneck 

2016-11-06.  p. 422-426. DOI : 10.1109/ACSSC.2016.7869073.

High-level system synthesis and optimization of dataflow programs for MPSoCs, 2016 50th Asilomar Conference on Signals, Systems and Computers

E. Bezati; S. C. Brunet; M. Mattavelli; J. W. Janneck 

2016-11-06.  p. 417-421. DOI : 10.1109/ACSSC.2016.7869072.

Design Space Exploration Problem Formulation for Dataflow Programs on Heterogeneous Architectures, 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)

M. Michalska; N. Zufferey; E. Bezati; M. Mattavelli 

2016-09-21.  p. 217-224. DOI : 10.1109/MCSoC.2016.25.

Programming Models and Methods for Heterogeneous Parallel Embedded Systems, 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)

S. Casale-Brunet; E. Bezati; M. Mattavelli 

2016-09-21.  p. 289-296. DOI : 10.1109/MCSoC.2016.39.

High-Precision Performance Estimation of Dynamic Dataflow Programs, 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)

M. Michalska; S. Casale-Brunet; E. Bezati; M. Mattavelli 

2016-09-21.  p. 101-108. DOI : 10.1109/MCSoC.2016.23.

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms, 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)

E. Bezati; S. Casale-Brunet; M. Mattavelli; J. W. Janneck 

2016-07-17.  p. 227-234. DOI : 10.1109/SAMOS.2016.7818352.

An Evaluation Framework for Lossy Compression of Genome Sequencing Quality Values

C. Alberti; N. Daniels; M. Hernaez; J. Voges; R. L. Goldfeder et al. 

2016. IEEE Data Compression Conference 2016, Snowbird, Utah, USA, DOI : 10.1109/Dcc.2016.39.

2015

H2B2VS (HEVC Hybrid Broadcast Broadband Video Services) – building innovative solutions over hybrid networks

R. Monnier; A. Mourelle; J-P. Bernoux; C. Alberti; J. Le Feuvre et al. 

2015. International Broadcasting Conference 2015, Amsterdam, September 11, 2015.

A Methodology for Profiling and Partitioning Stream Programs on Many-core Architectures

M. Michalska; J. Boutellier; M. Mattavelli 

2015. International Conference on Computational Science (ICCS), Reykjavik, Iceland, June 1-3, 2015. p. 2962-2966. DOI : 10.1016/j.procs.2015.05.498.

Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs

M. Michalska; S. Casale-Brunet; E. Bezati; M. Mattavelli 

2015. International Conference on Computational Science (ICCS), Reykjavik, Iceland, June 1-3, 2015. p. 1443-1452. DOI : 10.1016/j.procs.2015.05.334.

2014

TURNUS: an open-source design space exploration framework for dynamic stream programs

S. Casale Brunet; M. Michalska; E. Bezati; M. Mattavelli; J. Janneck et al. 

2014. Conference on Design and Architectures for Signal and Image Processing (DASIP), Madrid, October 2014.

Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling

M. Canale; S. Casale Brunet; E. Bezati; M. Mattavelli; J. Janneck 

2014. 2014 IEEE Workshop on Signal Processing Systems (SiPS), Belfast, October 2014.

MPEG high efficient video coding stream programming and many-cores scalability

D. J. De Saint Jorre; D. Renzi; S. Casale Brunet; M. Michalska; E. Bezati et al. 

2014. 

TURNUS: An open-source design space exploration framework for dynamic stream programs

S. Casale-Brunet; M. Wiszniewska; E. Bezati; M. Mattavelli; J. W. Janneck et al. 

2014. 2014 Conference on Design and Architectures for Signal and Image Processing (DASIP), Madrid, Spain, 8-10 October 2014. p. 1-2. DOI : 10.1109/DASIP.2014.7115614.

Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control

S. Casale-Brunet; E. Bezati; M. Mattavelli; M. Canale; J. W. Janneck 

2014. 2014 Conference on Design and Architectures for Signal and Image Processing (DASIP), Madrid, Spain, 8-10 October 2014. p. 1-6. DOI : 10.1109/DASIP.2014.7115623.

Coarse grain clock gating of streaming applications in programmable logic implementations

E. Bezati; S. Casale Brunet; M. Mattavelli; J. W. Janneck 

2014. 2014 Electronic System Level Synthesis Conference (ESLsyn), San Francisco, CA, USA, 31 May - 1 June 2014. p. 1-6. DOI : 10.1109/ESLsyn.2014.6850387.

Characterizing communication behavior of dataflow programs using trace analysis

J. W. Janneck; S. Casale-Brunet; M. Mattavelli 

2014. 2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), Agios Konstantinos, Samos, Greece, 14-17 July 2014. p. 44-50. DOI : 10.1109/SAMOS.2014.6893193.

Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms

D. De Saint Jorre; C. Alberti; M. Mattavelli; S. Casale-Brunet 

2014. 2014 IEEE International Conference on Image Processing (ICIP), Paris, France, 27-30 October 2014. p. 2115-2119. DOI : 10.1109/ICIP.2014.7025424.

Dataflow machines

J. W. Janneck; G. Cerdersjo; E. Bezati; S. C. Brunet 

2014. 2014 48th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA, USA, 2-5 November 2014. p. 1848-1852. DOI : 10.1109/ACSSC.2014.7094788.

Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling

M. Canale; S. Casale-Brunet; E. Bezati; M. Mattavelli; J. W. Janneck 

2014. 2014 IEEE Workshop on Signal Processing Systems (SiPS), Belfast, United Kingdom, 20-22 October 2014. p. 1-6. DOI : 10.1109/SiPS.2014.6986054.

Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case

C. Sau; L. Raffo; F. Palumbo; E. Bezati; S. Casale-Brunet et al. 

2014. 2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), Agios Konstantinos, Samos, Greece, 14-17 July 2014. p. 59-66. DOI : 10.1109/SAMOS.2014.6893195.

Coarse Grain Clock Gating Of Streaming Applications In Programmable Logic Implementations

E. Bezati; S. C. Brunet; M. Mattavelli; J. W. Janneck 

2014. 4th Electronic System Level Synthesis Conference (ESLsyn), San Francisco, CA, MAY 31-JUN 01, 2014.

A Methodology For Optimizing Buffer Sizes Of Dynamic Dataflow Fpgas Implementations

A. A-H. Ab Rahman; S. Casale-Brunet; C. Alberti; M. Mattavelli 

2014. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Florence, ITALY, MAY 04-09, 2014.

ECMA-407: A New 3D audio codec implementation up to NHK 22.2

J. J. Ahmad; C. Alberti; J. Hong; B. Leonard; M. Mattavelli et al. 

2014. The 28th VDT International Convention 2014.

ECMA-407: New Approaches to 3D Audio Content Data Rate Reduction with RVC-CAL

J. J. Ahmad; C. Alberti; J. Hong; B. Leonard; M. Mattavelli et al. 

2014. 137th International Audio Engineering Society (AES) Convention, Los Angeles, California, USA, October 9-12, 2014.

2013

Automated Qoe Evaluation Of Dynamic Adaptive Streaming Over Http

C. Alberti; D. Renzi; C. Timmerer; C. Mueller; S. Lederer et al. 

2013. 5th International Workshop on Quality of Multimedia Experience (QoMEX). p. 58-63.

Partitioning And Optimization Of High Level Stream Applications For Multi Clock Domain Architectures

S. C. Brunet; E. Bezati; C. Alberti; M. Mattavelli; E. Amaldi et al. 

2013. IEEE Workshop on Signal Processing Systems (SiPS). p. 177-182.

Modeling Control Tokens for Composition of CAL Actors

J. Ersfolk; G. Roquier; J. Lilius; M. Mattavelli 

2013. Conference on Design and Architectures for Signal and Image Processing (DASIP), Cagliari, Italy, October 8-10, 2013.

STATIC AND QUASI-STATIC COMPOSITIONS OF STREAM PROCESSING APPLICATIONS FROM DYNAMIC DATAFLOW PROGRAMS

J. Ersfolk; G. Roquier; W. Lund; M. Mattavelli; J. Lilius 

2013. IEEE International Conference on Acoustics, Speech and Signal Processing, Vancouver, Canada, May 26-31, 2013. p. 2620-2624.

Systems Design Space Exploration by Serial Dataflow Program Executions

S. Casale Brunet; C. Alberti; M. Mattavelli; J. Janneck 

2013. Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, USA, 3-6 November, 2013.

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications

S. Casale Brunet; E. Bezati; C. Alberti; M. Mattavelli; E. Amaldi et al. 

2013. Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, USA, 3-6 November, 2013.

Partitioning and Optimization of high level Stream applications for Multi Clock Domain Architectures

S. Casale Brunet; E. Bezati; C. Alberti; M. Mattavelli; E. Amaldi et al. 

2013. Signal Processing Systems (SiPS), Taipei, Taiwan, 16-18 October, 2013.

Dataflow Program Analysis and Refactoring Techniques for Design Space Exploration: MPEG-4 AVC/H.264 Decoder Implementation Case Study

A. Rahman; A. A. H. Bin; S. Casale Brunet; C. Alberti; M. Mattavelli 

2013. Design & Architectures for Signal & Image Processing (DASIP), Cagliari, Italy, October 8-10, 2013.

Porting an MPEG-HEVC decoder to a low-power many-core platform

D. S. Jorre; D. Jack; C. Alberti; M. Mattavelli; S. Casale Brunet 

2013. Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, USA, November 3-6th, 2013.

High-Level Synthesis of Dataflow Programs for Signal Processing Systems

E. Bezati; M. Mattavelli; J. Janneck 

2013. 8th International Symposium on Image and Signal Processing and Analysis (ISPA 2013), Trieste, Italy, 4-6, September 2013.

A Lego Mindstorms NXT Experiment for Model Predictive Control Education

M. Canale; S. Casale Brunet 

2013. European Control Conference, Zurich, Switzerland, 2013.

Design Space Exploration and Implementation of RVC-CAL Applications using the TURNUS framework

S. Casale Brunet; E. Bezati; G. Roquier; C. Alberti; M. Mattavelli et al. 

2013. Conference on Design & Architectures for Signal & Image Processing, Cagliari, Italy, 8-10 October 2013.

TURNUS: A design exploration framework for dataflow system design

S. Casale Brunet; M. Mattavelli; J. W. Janneck 

2013. 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 05 2013. p. 654-654. DOI : 10.1109/ISCAS.2013.6571927.

Synthesis and optimization of high-level stream programs

E. Bezati; S. Casale Brunet; M. Mattavelli; J. Janneck 

2013. lectronic System Level Synthesis Conference (ESLsyn), Austin, Texas, USA, May 31 2013-June 1 2013.

Buffer optimization based on critical path analysis of a dataflow program design

S. Casale Brunet; M. Mattavelli; J. W. Janneck 

2013. 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 05 2013. p. 1384-1387. DOI : 10.1109/ISCAS.2013.6572113.

Live demonstration: High level software and hardware synthesis of dataflow programs

E. Bezati; G. Roquier; M. Mattavelli 

2013. 2013 IEEE International Symposium on Circuits and Systems (ISCAS),, Beijing, China, 19-23 May 2013. DOI : 10.1109/ISCAS.2013.6571930.

Performance Benchmarking of RVC based Multimedia Specifications

J. J. Ahmad; S. Li; M. Mattavelli 

2013. 20th IEEE International Conference on Image Processing (ICIP), Melbourne, Australia, September 15-18, 2013.

TURNUS: a unified dataflow design space exploration framework for heterogeneous parallel systems

S. Casale Brunet; M. Mattavelli; C. Alberti; J. W. Janneck 

2013. Conference on Design & Architectures for Signal & Image Processing, Cagliari, Italy, 8-10 October 2013.

Design Space Exploration of High Level Stream Programs on Parallel Architectures: A focus on the Buffer Size Minimization and Optimization Problem

S. Casale Brunet; M. Mattavelli; C. Alberti; J. W. Janneck 

2013. 8th International Symposium on Image and Signal Processing and Analysis, Trieste, Italy, 4-6 September 2013.

Representing Guard Dependencies in Dataflow Execution Traces

S. Casale Brunet; M. Mattavelli; C. Alberti; J. W. Janneck 

2013. 2013 Fifth International Conference on Computational Intelligence, Communication Systems and Networks (CICSyN), Madrid, Spain, 5-7 06 2013. p. 291-295. DOI : 10.1109/CICSYN.2013.26.

Automated QoE Evaluation of Dynamic Adaptive Streaming over HTTP

C. Alberti; D. Renzi; C. Timmerer; C. Mueller; S. Lederer et al. 

2013. Fifth International Workshop on Quality of Multimedia Experience (QoMEX), Klagenfurt, Austria, July 3-5, 2013.

2012

Scheduling of dynamic dataflow programs based on state space analysis

J. Ersfolk; G. Roquier; J. Lilius; M. Mattavelli 

2012. IEEE International Conference on Acoustics, Speech and Signal Processing, Kyoto, Japan, March 25-30, 2012. p. 1661-1664.

Using Scalable Video Coding For Dynamic Adaptive Streaming Over HTTP in Mobile Environments

C. Müller; D. Renzi; S. Lederer; S. Battista; C. Timmerer 

2012. EUSIPCO12, Bucharest, Romania, 2012.08.31. p. 2208-2212.

Distributed Adaptation Decision-Taking Framework and Scalable Video Coding Tunneling for Edge and In-Network Media Adaptation

M. Grafl; C. Timmerer; M. Waltl; D. Renzi; S. Battista et al. 

2012. TEMU 2012, Heraklion, Greece, July 31, 2012. p. 6. DOI : 10.1109/TEMU.2012.6294710.

Profiling of Dataflow Programs Using Post Mortem Causation Traces

S. Casale Brunet; M. Mattavelli; J. W. Janneck 

2012. 2012 IEEE Workshop on Signal Processing Systems (SiPS), Quebec City, QC, Canada, 17-19 October 2012. p. 220-225. DOI : 10.1109/SiPS.2012.54.

Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program

A. Rahman; A. A. H. Bin; R. Thavot; S. Casale Brunet; E. Bezati et al. 

2012. 2012 Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany, 25 October 2012.

2011

Methodology For The Hardware/Software Co-Design Of Dataflow Programs

G. Roquier; R. Thavot; M. Mattavelli 

2011. IEEE Workshop on Signal Processing Systems (SiPS), Beirut, LEBANON, Oct 04-07, 2011. p. 174-179. DOI : 10.1109/SiPS.2011.6088970.

Portable and scalable parallelism for multi-core and reconfigurable hardware using dataflow programs

G. Roquier; E. Benzati; M. Mattavelli; J. W. Janneck 

2011. MCC2011, Fourth Swedish Workshop on Multicore Computing, Linköping, Sweden, November 23-25, 2011.

Building Multimedia Security Applications in the MPEG Reconfigurable Video Coding (RVC) Framework

J. J. Ahmad; S. Li; I. Amer; M. Mattavelli 

2011. 13th ACM WS on Multimedia and Security, Buffalo, NY, USA, Sept 29-30, 2011. p. 121-130.

Hardware/Software Co-Design of Dataflow Programs for Reconfigurable Hardware and Multi-Core Platforms

G. Roquier; E. Bezati; R. Thavot; M. Mattavelli 

2011. DASIP 2011, Conference on Design and Architectures for Signal and Image Processing, Tampere, Finland, Nov 2-4, 2011.

A Unified Hardware/Software Co-Synthesis Solution for Signal Processing Systems

E. Bezati; H. Yviquel; M. Raulet; M. Mattavelli 

2011. DASIP 2011, Conference on Design and Architectures for Signal and Image Processin, Tampere, Finland, Nov 2-4, 2011.

Optimization of Portable Parallel Signal Processing Applications by Design Space Exploration of Dataflow Programs

C. Lucarz; M. Mattavelli; J. Janneck 

2011. SIPS 2011, IEEE WS on Signal processing Systems, Beirut Lebanon, Oct. 4-7, 2011.

Scheduling of Dynamic Dataflow Programs with Model Checking

J. Ersfolk; G. Roquier; F. Jokhio; J. Lilius; M. Mattavelli 

2011. SIPS 2011, IEEE WS on Signal processing Systems, Beirut, Lebanon, Oct. 4-7, 2011.

Methodology for the Hardware/Software Co-Design of Dataflow Programs

G. Roquier; R. Thavot; M. Mattavelli 

2011. SIPS 2011, IEEE WS on Signal processing Systems, Beirut Lebanon, Oct.4-7, 2011.

Optimization Methodologies for Complex FPGA-based Signal Processing Systems with CAL

A. Rahman; A. A. H. Bin; H. Amer; A. Prihozhy; C. Lucarz et al. 

2011. 2011 Conference on Design and Architectures for Signal and Image Processing, Tampere, Finland, November 2-4, 2011.

Methodology and Technique to Improve Throughput of FPGA-based CAL Dataflow Programs: Case Study of the RVC MPEG-4 SP Intra Decoder

H. Amer; A. Rahman; A. A. H. Bin; I. Amer; C. Lucarz et al. 

2011. 2011 IEEE Workshop on Signal Processing Systems, Beirut, Lebanon, October 4-7, 2011.

Theses

2017

Systematic Design Space Exploration of Dynamic Dataflow Programs for Multi-core Platforms

M. M. Michalska / M. Mattavelli (Dir.)  

Lausanne: EPFL, 2017. DOI : 10.5075/epfl-thesis-7607.

2015

Analysis and optimization of dynamic dataflow programs

S. Casale-Brunet / M. Mattavelli (Dir.)  

Lausanne: EPFL, 2015. DOI : 10.5075/epfl-thesis-6663.

High-level synthesis of dataflow programs for heterogeneous platforms

E. Bezati / M. Mattavelli (Dir.)  

Lausanne: EPFL, 2015. DOI : 10.5075/epfl-thesis-6653.

2014

Optimizing Dataflow Programs for Hardware Synthesis

A. A. H. B. Ab Rahman / M. Mattavelli (Dir.)  

Lausanne: EPFL, 2014. DOI : 10.5075/epfl-thesis-6059.

Book Chapters

2011

MPEG Reconfigurable Video Representation

M. Mattavelli 

The MPEG Representation of Digital Media; Springer, 2011.

Posters

2018

Transcriptome reconstruction with quality score distortion in reference-based alignment

A. A. Hernandez Lopez 

Research in computational molecular biology (RECOMB), Paris, France, April 19-24, 2018.

2017

Differential Gene Expression with Lossy Compression of Quality Scores in RNA-Seq Data

A. A. Hernandez-Lopez; J. Voges; C. Alberti; M. Mattavelli; J. Ostermann 

IEEE 2017 Data Compression Conference, Snowbird, Utah, USA, April 4–7, 2017.