Modelling a Fault Current Limiter element with Flux3D
Since they have no counterpart in the conventional power equipment technology, superconducting fault current limiters (sFCLs) are considered to be one of the most promising applications of high temperature superconductors (HTS).
All thin-film based resistive FCLs have a similar behavior: the switching time is very low (of the order of few microseconds), and the current peak during a short circuit reaches 3-4 times the critical current. Indeed, the temperature dependence of the physical properties of materials, such as critical current density and resistivity, is an important factor in devices where over-critical excursions may occur, or when –more generally– the current density locally exceeds the critical current density of the material.
For FEM modeling we are using a commercial software package called FLUX produced by CEDRAT.
Presentation of the considered FCL
The fault current limiter, developed by the University of Geneva, is a 5 kW FCL on 2 inch sapphire wafer, composed of a YBCO thin film covered by a gold layer.
Taking into account the symmetries and the periodicity of the design, only one fourth of a “cell” has been implemented to the FEM packages.
Electrical YBCO behavior
Based on measurements, a new model for the electrical behavior of the considered YBCO thin-film has been proposed.
Coupling the thermal equations with the electromagnetic equations
The computation has been separated in two different parts, using at each time step the loss results of the former as input for the latter, as illustrated in the figure below.
Obtained results
For the simulation, a driving sinusoidal voltage source at 50 Hz has been used. For modeling the electrical fault, the resistive load failed from 3 to 0.02 at ωt = π or t = 10 ms.
The next picture shows the total current flowing through the device during the first milliseconds after the fault occurs. According to the expectations, the global behavior is the following: first, the current increase rapidly, up to 3 Ic, due to the low resistance of the electric circuit. Secondly, the power losses inside the FCL lead to temperature increase and a limitation process.
The two figures below show the local current density and the local temperature of the device for t = 11 ms, or 1 ms after the electric fault.
This work has been done by Joseph Duron within his thesis work.